000 -LEADER |
fixed length control field |
00686nmm a2200205 4500 |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20250819124124.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
250819b ||||| ||d| 00| 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
ISBN |
9788177589184 |
041 ## - LANGUAGE CODE |
Language code of text/sound track or separate title |
eng |
100 ## - MAIN ENTRY--AUTHOR NAME |
Personal name |
Palnitkar, Samir |
245 ## - TITLE STATEMENT |
Title |
Verilog HDL: a guide to digital design and synthesis |
Medium |
[electronic resource] |
250 ## - EDITION STATEMENT |
Edition statement |
2nd ed. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
Place of publication |
Noida |
Name of publisher |
Pearson India |
Year of publication |
c2003 |
300 ## - PHYSICAL DESCRIPTION |
Number of Pages |
1 CD-ROM |
Accompanying material |
Received along with book |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical Term |
Computer engineering |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical Term |
System analysis and design |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical Term |
Hardware description language (HDL) |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical Term |
Verilog (Computer hardware description language) |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Koha item type |
CD/DVD |